Asynchronous FIFO Interfaces for GALS On-Chip Switched Networks
نویسندگان
چکیده
In this paper we present a novel design approach that combines the advantages of on-chip switched networks (OCSNs) and the globally asynchronous, locally synchronous (GALS) design methodology using the mechanism of asynchronous FIFO buffers. Our proposed two GALS OCSN models were synthesized with 0.25μm Chip Express structured ASIC library. Comparative simulations were performed for these two platforms using three different mixed-clock test scenarios to show functional verification. Performance results are given.
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تاریخ انتشار 2005